1. Technical Field
The embodiments described here relate to a semiconductor integrated circuit (IC) and, more particularly, a pumping voltage detector for a semiconductor IC.
2. Related Art
Generally, conventional semiconductor memory apparatus require a pumping voltage VPP during storage or output of data in order to prevent loss of the data. Accordingly, most semiconductor memory apparatus include a pumping voltage generating circuit and a pumping voltage detector, wherein the pumping voltage detecting circuit includes a supply voltage divider and a comparator.
In the pumping voltage detecting circuit, a detection signal instructs voltage pumping during data storage, and must be frequently generated in order to prevent data loss. Thus, the pumping voltage detecting circuit additionally includes a mode setting unit and a sensitivity adjustor that adjusts the sensitivity of the supply voltage divider according to a mode setting result. The sensitivity adjustor provides a signal, which subdivides the supply voltage, to the supply voltage divider in a data storage mode.
For example, the pumping voltage detecting circuit generates the detection signal when a semiconductor memory apparatus is switched from a standby mode or a data output mode to the data storage mode. However, when the semiconductor memory apparatus is substantially switched from the standby mode or the data output mode to the data storage mode, the pumping voltage detecting circuit does not immediately generate the detection signal, and the detection signal is enabled after a predetermined time lapses. Accordingly, if an enable timing of the detection signal is delayed, a data storage operation may be delayed or inadequately performed.